@article{ref1,
title="Uniform void-free epitaxial CoSi 2 formation on STI bounded narrow Si(lOO) lines by template layer stress reduction",
journal="Electrochemical and Solid-State Letters",
year="2004",
author="Ho, C.S. and Pey, K.L. and Tung, C.H. and Zhang, B.C. and Tee, K.C. and Karunasiri, G. and Chua, S.J.",
volume="7",
number="11",
pages="H49-H51",
abstract="Void free epitaxial-CoSi 2 with nano-thickness has been successfully fabricated on narrow Si(lOO) substrates surrounded by shallow trench isolation (STI) using a capped titanium mediated epitaxy method. The suicide is epitaxial with a CoSi 2(110)IISi( 100) crystal orientation. Void growth in the narrow silicon lines under the film edges due to an anomalous creep effect in the presence of a localized tensile stress between CoSi 2 and Si was suppressed completely by optimizing the initial rapid thermal annealing (RTA) thermal budget, and ensuring that no voids nucleated prior to the selective wet clean and second higher-temperature RTA process. The epitaxial Co-silicided n/p metal oxide semiconductor field effect transistors show excellent device performance. © 2004 The Electrochemical Society, All rights reserved.<p /><p>Language: en</p>",
language="en",
issn="1099-0062",
doi="10.1149/1.1798191",
url="http://dx.doi.org/10.1149/1.1798191"
}