TY  - JOUR
PY  - 2004//
TI  - Buried tungsten silicide layer in silicon on insulator substrate by smart-cut®
JO  - Semiconductor Science and Technology
A1  - Luo, S.H.
A1  - Liu, W.L.
A1  - Zhang, M.
A1  - Di, Z.F.
A1  - Wang, S.Y.
A1  - Song, Z.T.
A1  - Lin, C.L.
A1  - Zou, S.C.
SP  - 1329
EP  - 1332
VL  - 19
IS  - 11
N2  - A single-crystalline Si/SiO2/poly-WSix/Sub-Si structure has been successfully fabricated by a new method incorporating a standard smart-cut® technique and a high temperature reaction between tungsten and silicon. Annealing at 800-1100°C does not only strengthen the bonding of the wafers but also induces solid phase reaction of deposited tungsten and silicon. A poly-crystalline WSix (1 < x < 2) layer with a tetragonal structure is formed below the buried oxide layer. Cross section images of TEM show three steep interfaces of the four layers. It is found that increasing the annealing temperature is in favour of decreasing the sheet resistance of tungsten suicide and improving the crystal quality of the top silicon layer. However, a spreading resistance profile measurement shows that annealing under high temperature (≥1000°C) will induce diffusion of tungsten into the Si substrate which is confirmed by the EDX results and the reason is presented.<p /> <p>Language: en</p>
LA  - en
SN  - 0268-1242
UR  - http://dx.doi.org/10.1088/0268-1242/19/11/021
ID  - ref1
ER  -